Design Methodology – Principal DRAM Power Integrity Engineer

Req. ID: JR97282 Design Methodology – Principal DRAM Power Integrity Engineer Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: * Develop and standardize EMIR methodology that applies consistently across all DRAM products, ensuring alignment, repeatability, and high-quality analysis outcomes * Perform static and dynamic EM/IR and PDN analysis using RedHawk or Totem or other industry‑standard tools; identify root‑cause issues such as high‑resistance segments, insufficient via density, and decap deficiencies, and provide clear, actionable recommendations to design and layout teams. * Actively leverage AI‑based tools, agentic workflows, and automation frameworks for effective Power-delivery-network (PDN) analysis. * Maintain a strong understanding of the full EMIR flow—from netlist preparation, extraction, simulation, and debug to reporting and silicon correlation—and ensure accurate evaluation across operating modes and temperatures. * Partner across design, timing, physical implementation, architecture, modeling, and verification teams to understand real switching behavior, develop worst‑case vectors, and standardize analysis expectations across global teams. * Collaborate with cross-geographical teams and also EDA tool vendors to evaluate and improve EMIR methodologies, and document Best Known Methods (BKMs) to enhance consistency and correlation across DRAM teams. * Develop and maintain dashboards to track EMIR results, monitor trends, and support signoff progression for multiple designs. Qualifications: * Master’s degree in electrical or computer engineering. * 8 - 14 years of experience in PDN / Power Integrity / EMIR analysis for advanced semiconductor or SoC designs. * Deep hands‑on experience with Ansys RedHawk or Totem for full‑chip EM/IR verification and PDN analysis, including setup, scenario creation, debug, and root‑cause analysis. * Expertise in vectorless and dynamic/pattern‑based IR‑drop analysis, with strong ability to interpret current behavior, switching activity, and voltage‑sensitivity trends. * Proven ability to identify root causes of IR‑drop issues—including switching activity, grid resistance, parasitics, routing topology—and translate analysis results into actionable design or layout fixes. * Experience performing SoC‑level or chip‑level EMIR signoff and supporting tapeouts. * Solid understanding of PDN interactions with circuit timing/margin, layout topology, and chip‑level power architecture. * Ability to understand the full end‑to‑end design flow, including RTL, floorplanning, routing, extraction, EMIR, STA, and silicon correlation. * Familiarity with Make or similar automation frameworks for EMIR rollups. * Hands‑on experience with low‑power, multi‑voltage, power‑off, or mixed‑signal designs. * Experience in chip‑level IR/EM analysis and driving closure across multi‑functional teams. Preferred Qualifications: * Experience with power‑modeling or current‑source modeling flows (e.g., CPM). * Scripting skills in Python/Tcl for automation and data analysis. * Experience in improving EMIR/PI analysis flows or methodology. * Knowledge of PnR or STA tools (FusionCompiler, PrimeTime). * Background in circuit design with SPICE experience. * Exposure to or strong interest in AI/ML-assisted design flows, agentic AI or advanced automation in circuit design and verification. * Familiarity with memory‑product power behavior (DRAM/SRAM/NAND). Job Profile(s): Semiconductor Design Engineer 5 Relocation level: (TBD) Before Getting Started Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence. * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process. ​​​​ As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.