Senior Engineer - Standard Cell Design

Req. ID: JR100652 Senior Engineer - Standard Cell Design Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities * Design and maintain standard cells for new DRAM products on new technology * Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies * Characterization and modeling of Standard cells to provide timing/power model * Quality Analysis of characterized liberty models in terms of performance, Power and Functionality * Develop automation test bench/flow/tools to improve the work efficiency and help data analysis * Co-work with international colleagues on developing new flows and tools for stdcells design * Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements * Good understanding of CMOS circuit design * Good knowledge of CMOS device physics and layout * Experience in total stdcells flow from DTCO development/ spec definition till lib release * RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow * Finefet & planner experience required. * Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. * Experience in Primetime, Solido Analytics * Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision * Experience in Standard Cell design, layout and verification * Experience in Skill, TCL, Perl, Python to do test bench automation and data analysis * Previous work experience in DRAM memory related fields or analog blocks is a plus * Good interpersonal & communication skills and ability to work well in a team * Experience using AI-assisted tools to improve stdcells design & char productivity, with a strong emphasis on correctness, validation, and responsible use of enterprise-approved AI systems Job Profile(s): Semiconductor Design Engineer 3 Relocation level: (TBD) Before Getting Started Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence. * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process. ​​​​ As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.